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Five years ago I wrote an article about the coming wall for flash chip density. Increasing flash density is important because it allows manufacturers to put more capacity in a given amount of space. It should also decrease costs which has been the Achilles heel of flash storage for a long time.
You can achieve increased flash density a couple of ways. One way is to decrease the feature size of the flash chips. A second way is to change the technology. You could even argue that there is a third way which is to use both approaches. Regardless, the desire is to improve the price of flash drives while maintaining or improving performance and increasing drive capacity.
A great deal has happened since I wrote that article discussing why flash chip density would stop growing because of feature size limitations. Nonetheless, the price/capacity ratio ($/GB) has greatly improved. But how is this possible because of the chip density limitations? Did chips actually increase in density or were other factors involved?
Reducing Chip Feature Size
As I discussed in my original article, one way to improve flash chip density is to reduce the feature size on the chips. It appears that generally flash drive manufacturers are doing mass production around 20nm (plus or minus). Most of them have demonstrated flash chips smaller than 20nm, but they have not really appeared in quantity (Note: I view the recent Plextor drive at 19nm as virtually the same as 20nm.) You can get smaller than 20nm, but you will have to use a great deal more error correcting because of the small feature size, which leads to a greater possibility of data disturbance due to a write. You may also have to tolerate a lower Program/Erase (P/E) number, and to maintain capacity, more over-provisioned space may be necessary. The combination of these factors offsets the benefits of the smaller feature size and are likely to result in flash drive prices flattening.
Yet flash chip manufacturers have continued to drive down prices and even improve performance. Since reducing the feature size of flash chips is not a good way to reduce drive prices, flash manufacturers have focused on other techniques for making denser flash chips and reducing the cost.
Denser cells - TLC and more
The initial flash chips used Single-Level Cell (SLC) technology, where each cell can hold one bit of information (two states). These chips are fast, use relatively little power, have long endurance (lots of P/E cycles), but have low density, leading to less dense and more costly drives. Multi-Level Cell (MLC) chips use cells that can store two bits of information (four states) per cell. This doubles the chip density at the cost of a slower write speed, slightly higher power and about one-tenth of the endurance (number of P/E cycles) relative to SLC. MLC increases the density of the flash chips but lowers the cost.
Fairly recently, Triple Level Cells (TLC) have been introduced. These cells can store three bits of information (eight states) each. This triples the density relative to SLC, which can really reduce the cost of flash drives. But these chips have slower write speeds compared to SLC and MLC. They also use slightly more power than MLC and have about one-tenth the endurance of MLC chips. The table below lists rule of thumb endurance and performance numbers for the three types of flash cells.
|Bits per cell||1||2||3|
As you can see from the table, the performance and endurance of the cells decreases as you add the ability to store more bits. However, the reason more bits/cell is so attractive is density. Using the same feature size (such as 20nm), a 16 GB SLC chip becomes a 32 GB chip using MLC, and a 48 GB chip using TLC. This reduces the cost of the chips on a per gigabyte basis, which means more capacity. So more people buy the drives, which can further lower the price, and so on.